Senior Photovoltaics / Solar Array Engineer - Solar & Deployables
About the role
Muon seeks a Senior Photovoltaics / Solar Array Engineer to own the design, qualification, and sustainment of the photovoltaic systems that power our spacecraft — solar cell selection and test, encapsulation and lamination, array electrical architecture, and array-level performance prediction. This role owns the array from cell coupon through qualified flight hardware, optimizing total system efficiency across mass, power, and cost.
You'll be a foundational member of our new Solar & Deployables hardware group, serving as technical owner of the photovoltaics pillar. Starting from Muon's platform building blocks, you'll tailor designs to mission requirements, partner closely with solar cell vendors and manufacturers, and make key decisions that balance power performance, reliability, cost, and schedule.
Due to the hands-on nature of this role, it requires onsite work at our San Jose, CA location three days a week.
Responsibilities
Serve as the technical owner for photovoltaic systems — cells, encapsulation, and array electrical architecture — for assigned missions
Lead solar cell selection and qualification, including procurement specifications, screening, and radiation/thermal performance characterization
Build and manage partnerships with solar cell vendors and manufacturers, from cell procurement through co-development of array assemblies
Define array electrical architecture: string sizing, blocking/bypass diode strategy, grounding and bonding, and layout
Optimize total system efficiency — trading mass, power, and cost at the array and spacecraft level
Develop and maintain array performance predictions (BOL/EOL, radiation degradation, thermal derating) and reconcile them against test and on-orbit data
Own encapsulation, lamination, and bonding processes for panel assembly; partner with manufacturing on work instructions, tooling, and yield improvements
Own array and coupon qualification, including environmental test (vibration, TVAC, thermal cycling) and acceptance data packages
Work with mechanical, structural, and thermal engineers to iterate array designs for performance and manufacturability; support make vs. buy decisions
Document and champion photovoltaics best practices and design standards; contribute to design reviews (PDR, CDR, MRR)
Mentor junior engineers and technicians, and drive arrays to scale from prototype builds to constellation quantities
Required Qualifications
8+ years of experience designing, building, and testing high-reliability hardware, including 5+ years with solar arrays or photovoltaic systems
Strong understanding of solar cell physics, with hands-on experience across single, double, and triple junction cells
Hands-on experience with one or more of: space solar cell selection/screening, encapsulation/lamination, or array electrical design
Working knowledge of array performance prediction (BOL/EOL, radiation and thermal effects) and power budgeting
Experience with array or coupon qualification, including environmental test (TVAC, vibration, thermal cycling)
Strong systems-level thinking across electrical, mechanical, thermal, and power domains
Strong skills with drawings, GD&T, BOMs, and mass/power budgets; proficiency with standard tools (CAD, PLM, test equipment)
Extensive documentation capabilities: build procedures, test plans, design trades
Experience working with external vendors for part development and manufacturing
Excellent communication, presentation, and cross-functional coordination skills
B.S. or higher in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, or related field
Nice-to-have Skills
Flight heritage — solar array hardware you designed that has successfully operated in space
Direct experience with IMM space solar cells and coverglass selection
Experience with array electrical modeling and radiation-degradation methods (e.g., EQFLUX / displacement damage dose)
Experience defining or running in-house panel lamination processes
Familiarity with grounding, bonding, and ESD/arcing mitigation for high-voltage arrays
Experience with array substrate/panel mechanical design and integration with deployables
Software skills in Python, MATLAB, or similar
Salary
The salary range for this role is $183,000- $198,000, plus a competitive equity grant and comprehensive benefits package. Final compensation will be determined based on skills, qualifications, experience, and geographic location as assessed during the interview process.