Sr. Design for Test (DFT) Engineer
We are hiring a Sr DFT Engineer to help us build high-performance ASICs for the next generation of AI acceleration systems. In this role, you will be responsible for physical design in leading-edge CMOS technology. This includes synthesis through place and route, timing closure, and tape-out signoff.
Responsibilities
Perform Design For Test (DFT) insertion on ASIC designs, including internal scan, boundary scan, and memory BIST
Perform automatic and targeted test pattern generation
Interface with Physical Design and Front End (RTL) Design
Perform post-silicon DFT bring-up and test program debug
Interface with ATE engineers for test program bring-up and debug
Scripting and automation of DFT and ATPG flow
Be hands-on from the "nitty gritty" details to high level planning.
Requirements
Bachelor's degree in Electrical Engineering (or other related fields)
Minimum of 13 years of industry experience working as a Design For Test Engineer on ASIC designs
Must have completed at least 2 tapeouts
Minimum of 2 years of experience with standard DFT CAD tools and flows
Hands-on experience in Python, TCL or other scripting environments
DFT/post-silicon/ATPG with experience in both ASIC and semi-custom COT flow
Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields
Ability to react to change and thrive in a fast paced environment
Preferred qualifications
Masters degree in Electrical Engineering (or related fields) with 10+ years of DFT experience
Experience working on ASIC designs with multiple production-quality ASIC tapeouts
Experience interfacing with ATE engineers
Experience with ATE test program development
Experience with fault modeling
Understanding of Timing, Physical Design, and Power impact of DFT structures
Proven Knowledge of Basic SoC Architecture and HDL languages like SystemVerilog and chipware components to work hand in hand with RTL designers
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
$123,000—$150,000 CAD