ASIC Network Architect

SambaNova Systems · Austin, Texas, United States; Remote - US; San Jose, California, United States · Engineering

Posted 2026-07-06

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About the role

SambaNova Systems is looking for a talented and motivated ASIC Network Architect to help us solve the most challenging and impactful problems in machine learning and artificial intelligence.

Responsibilities

As a ASIC Network Architect at SambaNova, you'll be responsible for defining the next generation of silicon networking solutions to enable state-of-the-art scale-up competitiveness for supercomputer scale AI/ML systems including:

Conduct research and development in state of the art networking solutions

Define and own networking architecture specifications of performant, robust and efficient  communications for the next generation super-pod scale ML hardware

Define and own the ML networking roadmap, leading a cross functional effort between software, systems, and silicon

Collaborate with executive leadership to align network initiatives with product competitiveness requirements

Stay on top of and contribute to industry standards representing SambaNova

Required Qualifications

BS, MS, or PhD degree in Computer Science, Computer Engineering or Electrical Engineering

10+ years of industry experience in ML silicon development in GPU, ML accelerator or networking ASIC

Proven track record of successful full-cycle development and delivery from planning to product in networking for such silicon solutions

Knowledge & Skills

Track record of ownership and definition of various networking and routing protocols

Deep understanding and hands-on experience defining various networking topologies for large machine clusters.

Deep understanding of congestion management, QoS, security isolation

Deep understanding of networking reliability, availability and serviceability

Capable of abstracting and analyzing network performance from real world application data

Capable of breaking down networking requirements into silicon, packaging, system SW, RunTime and Compiler SW requirements

Strong hands-on analytical and debug skills to make progress on challenging problems in an ambiguous and highly dynamic environment

Strong coding skills with C++, Python, or Rust

Leadership & teamwork

Highly motivated, self-driven, independent, organized and strong collaboration and communication skills

Cross-functional team leadership experience

Preferred Qualifications

15+ years of industry experience in ML / supercomputer / public cloud / networking industries

Good understanding of ASIC development cycles

Knowledge of machine learning architecture and/or computer architecture

Experience in building or proficiently using network simulators

Experience in leading silicon, packaging, system HW, system SW cross-functional teams

Experience in conducting perf and perf/tco trade-off analysis on different interconnect choices

Familiarity with off the shelf optical IP and optical switches

Understanding / hands-on experience in end to end optical systems

Hands-on experience in working with IP/Switch hardware vendor to enhance / customize solutions

Base Salary Range:

Base Pay Range

$250,000—$350,000 USD

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