Senior Principal Engineer, Hardware Application Engineering — Board & System Design
Required Qualifications
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
15+ years of hardware design, development, and validation experience for high-speed networking or compute systems.
7+ years of board and system design experience supporting high-speed platforms with 25G NRZ to 112G/224G PAM4 SerDes.
Strong experience owning the complete board design lifecycle, including architecture, schematic design, layout guidance, board bring-up, and validation.
Experience developing and delivering hardware reference designs for customer or internal platform adoption.
Expertise in:
High-speed PCB stack-up and material selection
Power architecture for high-current ASICs (PDN, sequencing, decoupling, tolerance analysis)
Thermal design and mechanical integration
Signal Integrity (SI) and Power Integrity (PI)
Hands-on experience with hardware bring-up, debugging, root-cause analysis, and lab equipment.
Strong knowledge of high-speed interfaces including Ethernet, PCIe, DDR, and modern SerDes technologies.
Experience with Design for Reliability (DFR), Design for Manufacturability (DFM), and Design for Testability (DFT).
Customer-facing experience supporting technical engagements and resolving deployment issues.
Excellent communication and technical presentation skills.
Preferred Qualifications
Experience with Ethernet switch platforms and AI networking/fabric architectures.
Experience designing platforms for hyperscale or megascale data centers.
Knowledge of ODM/CM manufacturing, qualification, and reliability testing.
Experience with advanced cooling technologies (liquid or immersion cooling).
Hands-on experience with Cadence Allegro/Sigrity or Mentor/Siemens Xpedition/HyperLynx.
Proven ability to influence product roadmaps and collaborate with cross-functional engineering teams.
Key Responsibilities
Lead board and system hardware design for high-speed networking and AI platforms.
Drive architecture, schematic development, PCB layout reviews, hardware validation, and board bring-up.
Collaborate with silicon, firmware, and systems engineering teams to optimize platform performance.
Review SI/PI analysis and support customer design reviews.
Provide technical leadership during customer engagements and platform deployment.
Develop technical documentation and deliver engineering training.
Serve as the technical bridge between customers, hardware engineering, and silicon development teams
California Pay Range
$200,000—$250,000 USD